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// software and tools, and its AMPP partner logic functions, and any output 
// files from any of the foregoing (including device programming or simulation 
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// Agreement, Intel FPGA IP License Agreement, or other applicable 
// license agreement, including, without limitation, that your use is for the 
// sole purpose of programming logic devices manufactured by Intel and sold by 
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// agreement for further details.

`timescale 1ns / 1ps
module SyncWithDefault #(parameter DEFAULT_OUT = 1'b0)
(
    input i_Clk,
    input i_Rst_n,
    input i_Signal,
    output o_SyncSignal
);
//////////////////////////////////////////////////////////////////////////////////
// Includes
//////////////////////////////////////////////////////////////////////////////////

//////////////////////////////////////////////////////////////////////////////////
// Defines
//////////////////////////////////////////////////////////////////////////////////

//////////////////////////////////////////////////////////////////////////////////
//Internal Signals
//////////////////////////////////////////////////////////////////////////////////

reg rSyncSignal_ff1;
reg rSyncSignal_ff2;
//////////////////////////////////////////////////////////////////////////////////
//Continuous assignment
//////////////////////////////////////////////////////////////////////////////////
assign o_SyncSignal = rSyncSignal_ff2;
//////////////////////////////////////////////////////////////////////////////////
//Sequential Section
//////////////////////////////////////////////////////////////////////////////////
always @(posedge i_Clk or negedge i_Rst_n)
begin
    if( !i_Rst_n)
    begin
        rSyncSignal_ff1    <= DEFAULT_OUT;
        rSyncSignal_ff2    <= DEFAULT_OUT;
    end
    else
    begin
        rSyncSignal_ff1   <= i_Signal;
        rSyncSignal_ff2 <= rSyncSignal_ff1;
    end
end
//////////////////////////////////////////////////////////////////////////////////
//Combinational Section
//////////////////////////////////////////////////////////////////////////////////

//////////////////////////////////////////////////////////////////////////////////
//Instances
//////////////////////////////////////////////////////////////////////////////////

endmodule
//////////////////////////////////////////////////////////////////////////////////